Real-time systems ranging from aircraft controllers and video gaming have been widely used in our society. For hard real-time systems and safety-critical applications, it is crucial to obtain the worst-case execution time (WCET) for schedulability analysis. However, recent microprocessor architectural designs, particularly multicore architectures, have made it increasingly complicated to estimate the WCET safely and accurately.

       In this talk, Dr. Zhang will introduce this recent research on time-predictable computing, especially on real-time multicore computing. Dr. Zhang and his students have recently proposed several static timing analysis techniques to tightly bound the WCET for multicore processors with shared caches. In addition, Dr. Zhang will introduce his ongoing research to design time-predictable cache architectures for multicore processors. These research efforts are likely to enable a wide variety of hard real-time systems to reliably exploit the potential of multicore computing to gain better performance, energy efficiency and time predictability.